Fabrication method of making silica-based optical devices and opto-electronic devices

ABSTRACT

The present invention relates to a method of fabricating optical devices and in particular to a method of fabricating integrated opto-electronic devices, and to an opto-electronic device. A plasma enhanced chemical vapor deposition process (PECVD) is used to deposit an optical device integrated in silicon onto an electronic device fabricated in silicon. Relatively low temperatures are utilized and, in order to reduce losses of a waveguide in the optical device in the wavelength range 1.50 to 1.53 μm, the deposition process is carried out in the absence of nitrogen. An optical device is disclosed which comprises an integrated construction incorporating an optical waveguide in silica and a photonic transducer in silicon.

FIELD OF THE INVENTION

The present invention relates generally to a method of fabricating anintegrated opto-electronic device and devices fabricated by the method,to a method of fabricating an optical device by a plasma enhancedchemical vapour deposition process, and, to low temperature fabricationof integrated opto-electronic devices, utilising a plasma enhancedchemical vapour deposition process.

BACKGROUND OF THE INVENTION

Processes and devices which merge silica optical devices with advancedsilicon electronics in integrated form are desirable. This will enable,for example, "super chips" to be provided which interface betweenoptical and electronic technologies.

To achieve this integration it is desirable to be able to producedevices which combine thin film waveguides, and/or other opticalcomponents, usually silica based, married to a semiconductor substratecontaining an electronic device or devices, usually silicon based.

One problem to be overcome in the fabrication of such devices isdevelopment of low temperature deposition processes which would allowdeposition of thin film waveguides directly on top of electronic devicesin a semiconductor substrate, without damaging the electronic devices.Plasma enhanced chemical vapour deposition (PECVD) is an attractiveoption for such low temperature deposition processes. Over the years ofcommercial use in conventional VLSI fabrication it has proven to bereliable, clean and well matched to modern automated IC production.

Some work has been done on the PECVD fabrication of waveguides.

1. [K. Imoto and A. Hori: "High refractive index difference and low lossoptical waveguide fabricated by low temperature processes", Electron.Lett., Vol. 29, 1993, pp. 1123-1124.]

2. [Franco Bruno, Massimo del Guidice, Roberto Recca, and FrancescoTesta: "Plasma enhanced chemical vapour deposition of low-loss SiONoptical waveguides at 1.5-μm wavelength", Appl. Opt., Vol. 30, 1991, pp.4560-4564.]

3. [E. S. Bulat, M. Tabasky, B. Tweed, C. Herrick, S. Hapkin, N. J.Lewis, D. Obias, and T. Fitzgerald: "Fabrication of waveguides usinglow-temperature plasma processing techniques", J. Vac. Sci. Technol.,Vol. A11, 1993, pp. 1268-1274.]

4. [Q. Lai, J. S. Gu, M. K. Smit, J. Schmid and H. Melchior: "Simpletechnologies for fabrication of low-loss silica waveguides:, Electron.Lett. Vol., 28, 1992, pp. 1000-1001.]

5. [G. Grand, J. P. Jadot, H. Danis, S. Valette, A. Fournier, A. M.Crouillet: "Low-loss PECVD silica channel waveguides for opticalcommunications", Electron. Lett., Vol. 26, 1990, pp. 2135-2137.]

6. [K. Kapser, C. Wagner, and P. P. Deimel: "Rapid deposition ofhigh-quality silicon-oxynitride waveguides", IEEE Trans. Phot. Techn.Lett., Vol 3, 1991, pp. 1096-1098.]

These prior art processes have utilised nitrogen as a refractive indexincreasing dopant and/or nitrous oxide as an oxidant for silane. Suchwaveguides suffer, however, from high (3 to 10 dB/cm) losses in thewavelength range 1.50 to 1.55 μm due to a large absorption peak in thisregion. These losses can only be reduced by annealing the fabricateddevice at temperatures around 1000° C., which would destroy anyelectronic circuits in an associated semiconductor substrate. Theseprocesses do not, therefore, allow production of practical integratedopto-electronic devices. Nitrous oxides has always been used in priorart processes as an oxidant for silane. This is because it gives betterthickness uniformity and is able to be used under high pressures, so asto optimise productivity.

SUMMARY OF THE INVENTION

The present invention is, in part, based upon the belief that N--H bondsare mostly responsible for the large absorption in the 1.50 to 1.55 μmrange.

From a first aspect, the present invention provides a method offabricating an integrated opto-electronic arrangement, comprising anoptical component fabricated in silica and an electronic componentfabricated in a semiconductor substrate, the method comprising the stepof forming the optical component by plasma enhanced chemical vapourdeposition (PECVD) onto the semiconductor substrate. Preferably thePECVD is carried out in the absence of nitrogen and nitrogen containingsource materials.

Nobody has before proposed the use of an oxidant which does not containnitrogen. Nobody before has made any suggestion that the absence ofnitrogen, together with a PECVD process for forming an optical device,would result in an improvement in the losses suffered in the wavelengthrange 1.50 to 1.55 micrometres.

Preferably, the PECVD process is carried out using oxygen as an oxidantfor silane to form deposited silica and fluorine as a dopant to vary therefractive index of the deposited silica. Carbon tetrafluoride ispreferably utilised as the source material for the flourine dopant.

Preferably, the semiconductor substrate is a silicon substrate.

Using this method, in preferred embodiments waveguide structures havebeen fabricated on a silicon wafer substrate at relatively lowtemperatures (low enough to ensure that any devices in the silicon wafersubstrate will not be destroyed or damaged) and with a propagation lossin the waveguides of less than 0.2 dB/cm at the 1.50 to 1.55 μmwavelengths range. The method, in at least preferred embodiments, istherefore suitable for the manufacture of integrated opto-electronicdevices.

Other standard fabrication processes (for example chemical etching) maybe utilised with the method of the present invention if required inorder to shape or form components of the integrated arrangement and aslong as the temperatures utilised will not damage electronic and/oroptoelectronic components in the semiconductor substrate.

A hollow cathode chamber arrangement is preferably employed for thePECVD process. In the preferred embodiment, a high plasma density hollowcathode deposition system is employed, incorporating two opposing rfpowered (with respect to a grounded chamber) electrodes for producing ahigh density plasma between them due to an "electron mirror" effect.

7. [C. M. Horwitz, S. Boronkay, M. Gross and K. E. Davies: "Hollowcathode etching and deposition", J. Vac. Sci. Technol, Vol. A6, 1988,pp. 1837-1844.]

The disclosure of this paper is considered incorporated therein byreference.

Such a system has not previously been employed for PECVD of opticalcircuits. Where oxygen is used as the oxidant, pressures in the chambershould preferably be sufficiently low to suppress spontaneous reactionbetween silane and oxygen (e.g., preferably below 5 Pa).

The method discussed above is suitable, in at least preferredembodiments, for application in fabricating any type of device whichcombines optics with electronics in an integrated form.

In an alternative embodiment, the present invention also hasadvantageous application for the fabrication of any optical device orcomponent, not just the formation of opto-electronic devices. Theadvantage of PECVD, and in particular the advantage of excludingnitrogen from the process to result in less loss at the 1.5 micrometrewavelength, results in a number of advantages for optical fabrication.In particular, fabrication is simpler because high temperature annealingis not necessary. High temperature annealing as such may causeadditional problems, such as loss of photosensitivity effect (which isuseful for UV-writing of Bragg gratings, for example), can result inchange in the refractive index of the waveguide layers, filmdelamination from the substrate and a number of other problems.

From a further aspect, the present invention provides a method offabricating an optical device on a substrate, comprising the step offorming an optical component by plasma enhances chemical vapourdeposition (PECVD) onto the substrate, the PECVD being carried out inthe absence of nitrogen and nitrogen containing source materials.

The method of this aspect of the invention may include any of the methodsteps discussed above, in relation to the previous aspect of theinvention.

One device which it would be particularly useful to be able to fabricateis one which allows the coupling of the core of a waveguide onto a photodiode or allows the core of the waveguide to be coupled to asemiconductor electronic light source, such as a surface emitting laser.This would provide a convenient interface between optics andelectronics. Present optical coupling to electronics relies on highlyaccurate positioning of an optical waveguide with respect to anelectronic component. This is very difficult to do and, in operation,such a device only requires a slight movement in relative position ofwaveguide and electronic component to deleteriously affect operation. Anintegrated opto-electronic device providing waveguide coupling withelectronic components would assist in overcoming these problems.

From a further aspect, the present invention provides an integratedopto-electronic device, comprising a multilayer silica structurefabricated on a semiconductor substrate, the silica structureincorporating a waveguide defining a light path and a reflector withinthe light path for steering light to or from an electro-optic transducerfabricated in the semiconductor substrate.

Preferably, but not essentially, the method discussed above in relationto the first aspect of the invention is employed to fabricate theopto-electronic device. The electro-optic transducer may be a surfaceemitting laser, for emitting light to the waveguide, or may be aphoto-diode for receiving light from the waveguide.

In a preferred construction, the waveguide lies in a plane which runssubstantially parallel to the surface of the semiconductor substrate.Light travels along the waveguide in a direction parallel to the surfaceof the semiconductor substrate and the reflector is arranged to directthe light downwards towards the semiconductor substrate or (where lightis being produced by a laser on the surface of the semiconductorsubstrate) directs light from the semiconductor substrate into and alongthe waveguide. The reflector is preferably positioned to provide anangle of incidence to the light beam of 45°.

In one embodiment, the reflector is formed by first forming a step inthe core, the step running at an angle (preferably 45°) to thelongitudinal direction of the waveguide core, and then forming areflector on the angled face of the step by depositing aluminiumthereon. A number of novel fabrication techniques are utilised in theformation of the step, as will become clear from the description givenherein of a preferred embodiment.

From yet a further aspect the present invention provides an integratedopto-electronic arrangement, comprising an optical component fabricatedin silica and an electronic component fabricated in a semiconductorsubstrate.

From yet a further aspect, the present invention provides a method offabricating an integrated opto-electronic device, comprising amultilayer silica structure fabricated on a semiconductor substrate, thesilica structure comprising a waveguide defining a light path and areflector within the light path for steering light to or from anelectro-optic transducer fabricated in the semiconductor substrate, themethod comprising the steps of, forming a waveguide core in a multilayersilica structure on a semiconductor substrate, forming an angled step inthe waveguide core, and treating a surface of the step to form areflector for steering light to the electro-optic transducer in thesemiconductor substrate.

BRIEF DESCRIPTION OF THE DRAWINGS

Features and advantages of the present invention will become apparentfrom the following description of embodiments thereof, by way of exampleonly, with reference to the accompanying drawings, in which:

FIG. 1 is a schematic diagram for illustrating the principle ofintegration of opto-electronic devices;

FIG. 1A is a cross section through a reactor chamber which may be usedto carry out a method in accordance with an embodiment of the presentinvention;

FIG. 2 is a graph to illustrate the dependence of the refractive indexand fluorine content of deposited silica films in a PECVD process inaccordance with the present invention, as a function of the CF₄ flowrate in the total gas flow;

FIG. 3 shows a Fourier Transform Infra-red (FTIR) spectra of a fluorinedoped and pure silicon film;

FIG. 4 shows waveguide absorption spectra for waveguides fabricated byPECVD with and without nitrous oxide as an oxidant;

FIG. 5 is a cross-sectional view through a opto-electronic device inaccordance with an embodiment of the present invention;

FIGS. 6a to 6h are diagrams illustrating stages in the fabrication ofthe device of FIG. 5;

FIG. 7 is a SEM photograph of one stage in the fabrication of the deviceof FIG. 5;

FIGS. 8a and 8b are SEM photographs illustrating another stage in thefabrication process of the device of FIG. 5;

FIGS. 9a and 9b are further SEM photographs illustrating a further stagein the fabrication of the device of FIG. 5; and

FIGS. 10a to 10c are diagrams illustrating alternative process steps forfabricating the device of FIG. 5.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is a schematic diagram showing a theoretical integratedopto-electronic device. The device comprises a silicon substrate 1 inwhich an electro-optic transducer 2 is fabricated together with aconductive connection 3 which connects to a conductor 4 which mayconnect to an external circuit or device, e.g., computer (NB circuit ordevice may be fabricated in the same semiconductor substrate). Theelectro-optic transducer 2 may be a photo diode, surface emitting laser,or any other device which operates to couple light and electricity.

Fabricated on the semiconductor substrate 1 is a multilayer silicastructure 5 containing optical components 6, in this case a waveguidecore 6 for guiding laser light. The core 6 operates to guide lightbetween the transducer 2 and an optical arrangement indicated byreference numeral 7, which may be an optic fibre connecting to anoptical system. Many silica based waveguide devices may be fabricated inthe same multilayer silica structure, to perform optical signalprocessing before coupling to the substrate device, for example.

As discussed above, manufacture of integrated opto-electronic circuitsof the type shown in FIG. 1 faces a number problems. The hightemperature conventionally used to process silica to form opticalcircuits would damage or destroy any electronic components in asemiconductor substrate being integrated with the optical circuit. Lowtemperature PECVD processes for forming optical circuits have provedunsatisfactory, due to the existence of a high transmission loss in thewavelength range 1.50 to 1.55 μm. In the preferred embodiment of thepresent invention, we employ a PECVD process for the fabrication of anoptical circuit in a multilayer silica structure onto a semiconductorsubstrate. Oxygen is used as the oxidising agent, in substitution fornitrous oxide as used in conventional parallel plate PECVD reactors.Fluorine is used as the refractive index varying dopant, the sourcematerial for fluorine being carbon tetrafluoride.

For the reactor, we employ a specially designed and built high plasmadensity hollow cathode deposition system. Such a system has beenproposed for fabrication of semiconductor devices (see reference 7) buthas not previously been proposed for PECVD of optical devices orintegrated opto-electronic devices. Such a system is capable ofdelivering a relatively high deposition rate (2000 Å per minute) atpressure sufficiently low to suppress spontaneous reaction betweensilane and oxygen (i.e., pressures generally below 5 Pa).

A cross-section through an example device is shown in FIG. 1A. Twoopposing aluminium electrodes 100, 101 are connected to a common 13.56MHz rf power supply 102. The diameter of each electrode 100, 101 is 14cm and the spacing between them is 3 cm. A conventional, low intensitydiode discharge is generated between each of the electrodes and thegrounded chamber, but between the two electrodes a very intense hollowcathode discharge region is created due to an "electric mirror" or"reflected electron" effect (see reference 7). The intensity of thishollow cathode discharge can be controlled by discharge confinement (8.K E Davis and C M Horwitz "diode and hollow cathode etching in a CF₄ "J. Vac. Sci. Technol, A7 (4), 2705-2708, (1989)). The subject matter ofreference 8 is considered to be incorporated herein by reference. In thepresent study a grounded confining ring 1.5 cm high 103 was used aroundthe lower electrode 101.

The reactor further comprises a vacuum chamber wall 104, with pump port105 leading to a vacuum pump. The substrate wafer 106 is supported onthe upper electrode 100.

To prevent particle generation due to spontaneous reaction betweensilane and oxygen at the relatively high pressure in the gas-feed pipes,the two gasses are delivered to the reactor separately. Silane issupplied through a circumferential set of holes 107 in the gap 108between the lower electrode 101 and the rounded chamber 104, whileoxygen is delivered through a single hole 109 in the chamber 104 sidewall. A circumferential geometry for oxygen delivery has been tested butno difference in the deposition uniformity was found, suggesting that itis entirely determined by the silane delivery. For doping, CF₄ ispre-mixed with silane before delivery.

The power level and pressure throughout the following examples wasgenerally kept at 600 w and 2 Pa, respectively. The self-developed biasvoltage on the two electrodes was in the range of 250 to 300 volts.

Please not that although this reaction chamber is preferred, otherexisting high plasma density sources capable of delivering highdeposition rate at low pressures could be used with the presentinvention (e.g., Transformer Coupled Plasma, Electron CyclotronResonance, Helicon source and so on).

FIG. 2 shows the dependence of the refractive index and fluorine contentof the deposited silica films, as a function of the CF₄ flow rate in thetotal gas flow. The oxygen to silane flow rate ratio was fixed at 6:1.The refractive index was measured by the prism coupling method (at awavelength of 0.6328 μm). It is seen that the refractive index decreasesgradually, and almost linearly, with the CF₄ percentage in the total gasflow. This allows for accurate refractive index control with a possibleindex difference between the silica core and the fluorine doped bufferand cladding layers ranging from 0.004 to about 0.02 with areproducibility within 0.001.

The fluorine and carbon content in the deposited films were determinedby Wavelength Dispersive X-ray Spectroscopy (WDS). The fluorine contentincreases linearly with the CF₄ percentage in the total gas flow (FIG.2) which agrees well with the observed change in the refractive index.At the same time no carbon above the sensitivitity of the WDS system(about 0.1 at %) was found in the deposited films. This is most likelythe result of oxidation of the carbon to form volatile CO or CO₂. Theabsence of carbon in the deposited films confirms that fluorineincorporation is the only mechanism by which the refractive index iscontrolled.

The Fourier Transform Infra red (FTIR) spectra of a fluorine doped and apure silica film are shown in FIG. 3. The absorption peak at 940 cm⁻¹observed on the resonant frequency of the Si--F bond vibration. Thissuggests that fluorine replaces oxygen in the silicon oxide tetrahedronand the observed decrease of the refractive index can thus be associatedwith the low polarisibility of the Si--F bond compared to that of Si--O.

EXAMPLE 1

Using the deposition process described above, a multilayer waveguidestructure was deposited on a silicon wafer substrate, followed byphotolithography and reactive ion etching to define the core ridge, andcompleted with a cladding deposition. No intentional heating of thesample electrode was used during the deposition processes but the waferwas heated by the discharge to a temperature of 250-300° C., asdetermined by a thermocouple attached to the back of the wafer. Thefinal waveguide consists of 9 μm thick fluorine doped buffer layer witha refractive index of 1450; a 4.5 μm square pure silica core with arefractive index of 14.62; and an 8 μm thick fluorine doped claddinglayer with refractive index equal to that of the buffer layer. Forcomparison, waveguides with similar geometry, but with the core layerdeposited from a mixture of silane and nitrous oxide were alsofabricated using the same plasma parameters as for the core layerdeposition from silane and oxygen.

The waveguide loss and absorption spectra were measured by placing thewaveguides between two standard single-mode fibres and measuring thetransmission characteristics. The waveguide absorption spectra forwaveguides fabricated with and without nitrous oxide as an oxidant areshown in FIG. 4. It is seen that the spectrum of the waveguidefabricated using oxygen as an oxidant does not have the absorption peakaround 1.5 μm wavelength seen in the spectrum of the waveguidefabricated using nitrous oxide. This comparison clearly indicates theeffect of nitrogen incorporation on the formation of the absorption peakaround 1.55 μm and, therefore, the importance of excluding nitrogen fromthe deposition process in order to obtain low loss in 1.50-1.55 μmwavelength range. Outback transmission loss measurements at 1.55 μmwavelength for the nitrogen free waveguides gave a propagation loss ofless than 0.2 dB/cm.

The peak at 1.38 μm is present on both the fluorine doped and nitrogendoped sample spectra and is due to absorption by O--H bonds.

One of the major applications of a monolithically integratedopto-electronic device would be in the coupling of optical andelectronic circuits, i.e., the coupling of laser light from/to anoptical circuit, with an opto-electronic transducer arranged to convertlight signals into electrical signals or visa versa. As discussed above,the presently available devices attempt to couple a waveguide directlyto an opto-electronic transducer. Alignment of the waveguide with thetransducer is a significant problem, is very difficult and subject toerror and movement over a period of use. The following example disclosesa monolithically integrated opto-electronic device which enablescoupling of light and electrical signals and which may be fabricated bythe novel PECVD process discussed above. The following example proposesfor the first time a technology for fabricating an integrated reflectorsuitable for vertical coupling of light out of the core of a waveguideonto a photo-diode and/or launching light from a surface emitting laserinto a waveguide. Vertical coupling has been used previously inaluminium gallium arsenide and gallium arsenide integrated optics, wherethe light is reflected by total internal reflection fromcrystallographically etched facets in the semiconductor material. In thecase of silica, however, crystallographic etching is not possible andtotal internal reflection is not practical due to the small refractiveindex differences involved it a protection layer has to be deposited ona complete opto-electronic circuit.

EXAMPLE 2

The method described here uses an etching technique to fabricate a 45°facet in the core of a silica-based waveguide, which is then aluminisedto obtain the necessary reflectively. Only a few additional steps arerequired to integrate this with a low-temperature, low-loss PECVDchannel waveguide process (as discussed above). An example of theproposed integration of a waveguide and photo-diode with the angledreflector is shown in FIG. 5. Since standard semiconductor fabricationprocedures are used throughout, the method has the potential tofacilitate cost-effective fabrication of silica-based monolithicallyintegrated opto electronic circuits. The device comprises a siliconsemiconductor substrate 8 in which a photo-diode 9, conductive contact10 and an anti-reflection layer 12 are fabricated using conventionalsemiconductor fabrication procedures. Subsequently, an optical structureis fabricated in silica on top of the semiconductor substrate. Theoptical structure comprises a buffer layer 13, a waveguide core 14 forthe transmission of light, an aluminised reflector 15 on the waveguidecore for directing light and a cladding layer 16.

The proposed fabrication procedure is shown in FIG. 6. The electroniccircuit is merely indicated with reference numeral 8 and is notindicated in FIG. 6 in detail. It will be realised, however, that thesubstrate 8 includes all the components shown in FIG. 5.

Firstly, a silica buffer layer of a thickness sufficient to opticallyisolate the waveguides 11 from the substrate 8 is deposited using aPECVD process as described above in relation to Example 1, followed byan amorphous silicon (a--Si) layer 17 about 1 μm thick (also by PECVD).

Prior to depositing the amorphous silicon layer 17, the surface of thebuffer layer 17 is subjected to plasma treatment in a plasma processingchamber with a hollow double cathode structure (reference 7), 3 cmelectrode spacing and 140 cm electrode diameter, aluminium cathodescoated with two microns of silicon dioxide. The gas used is oxygen, therf power is 600 W, the pressure is 2 Pa and the time of the plasmatreatment is 5 minutes. This creates a superficial layer is etchedfaster during a subsequent chemical etching step to create a desiredprofile of a "step" to be formed in the buffer layer (see later).

Windows are then opened in the amorphous silicon layer 17 at appropriatepoints above the photo-diodes 9 using standard photolithography andplasma etching (a window is indicated by reference numeral 18 in FIG.6a).

The wafer is then subjected to chemical etching in buffered HF in orderto produce a sloped (around 45°) etch profile 19 with a heightapproximately equal to the thickness of the core layer (FIG. 6b). Thea--Si 17 is used as the mask for this step since the adhesion ofphotoresist is not sufficient to withstand the relatively long chemicaletching process. During chemical etching, in a preferred process, thephotoresist mask 17a is left on the amorphous silicon to provide furtherprotection against etching in areas where etching is not required.

FIG. 7 shows an SEM photograph of the etched profile 19 with a--Si 17mask still in place. It can be seen that a straight profile 19 sloped atabout 45° is obtained, which differs from the isotropic (rounded)profile more typical of chemical etching. This is because of theprevious plasma treatment of the buffer layer surface which creates asuperficial layer (approx 100 nm thick) which is etched faster duringchemical etching. This effect can be observed in FIG. 7, where theprofile is seen to consist of two parts: a lower rounded part which is atypical isotropic profile; and an upper straight part which is theresult of the enhanced chemical etching of the superficial layer (notshown) at the silica/a--Si interface.

Following chemical etching, the a--Si mask 17 (and any remainingphotoresist 17a) is removed and the core layer 14 deposited by PECVD(FIG. 6c). During the core layer deposition it is important to ensurethat a sufficient level of ion-bombardment is used in order to maintainthe angle of the profile 19 created during the chemical etching of thebuffer layer. The conditions for ion-bombardment in the PECVD chamberare as follows:

Gas mixture.

Oxygen plus 15% SiH₄.

Pressure. 2 Pa

rf power. 600 W

Self-biased voltage on the cathode (determines the level of ionbombardment (250-300 volts).

The ion-bombardment helps to achieve a uniform redistribution ofdeposited species thus providing conformal step coverage.

This is illustrated in FIG. 8, where the profiles of layers depositedwith and without adequate ion-bombardment of the film surface duringPECVD are shown for comparison. The columnar structure of the film inFIG. 8b is also due to an insufficient level of ion-bombardment.

A standard etching technique is now used to define the channelwaveguides (FIG. 6d). A waveguide 14 ridge 20 is formed by etching todefine the path of the waveguide core 14. The surface of the bufferlayer is etched back, as indicated by ghost line 21. A layer ofphotoresist 22 is then spun on the wafer using conditions which causethe resist to be thinner over the tops of the waveguide core ridges,than elsewhere (FIG. 6e). The conditions for the laying down of thephotoresist are as follows:

Photoresist type, AZ 4330 positive photoresist

Sin. 25 SEC at 3000 RPM (rotations per min)

Exposure. 25 SEC's in Quintel Q 404 Mask Aligner (250 W lamp)

Development. MF 319 developer 80 SEC's.

It is possible therefore, to expose and develop the photoresist in sucha way that only the top sloped facets 23 of the core 14 are opened (FIG.2f). SEM photographs of the as-spun photoresist covering a waveguidecore ridge, and the same photoresist after development, are shown inFIGS. 9a and 9b, respectively.

The core facets 23 are now aluminised 24 by evaporation (FIG. 6g),followed by conventional "lift-off" of the aluminium deposited on thephotoresist (FIG. 6h). The final structure is then capped with anappropriate waveguide cladding layer (using PECVD) 16.

The fabrication procedure results in the device shown in FIG. 5 whichcan be utilised to couple optics and electronics.

An alternative, presently preferred method of forming the step in thewaveguide core will now be explained with reference to FIG. 10. Similarreference numerals are used for the same components as designated inFIG. 6.

Instead of the step being formed in the buffer layer 13 and the corelayer subsequently being deposited so that the profile of the core layerconforms to the stepped profile of the buffer layer, the core layer isactually formed with the step in it. The steps in this alternative areas follows. After a buffer layer 13 has been deposited, a core layer 14ais deposited on the buffer layer (FIG. 10a) and a amorphous silicon mask17 is deposited on top of the core layer. Windows 18A are opened in theamorphous silicon mask by using standard photolithography at appropriatepoints above the photo-diodes 9 (see FIG. 5).

Prior to depositing the amorphous silicon mask, the surface of the corelayer 18A is subjected to plasma treatment to create a superficial layerwhich will be etched faster by chemical etching (as previous method,above).

The core layer is then chemically etched (FIG. 10b) to produce achemically etched step profile 19A (photoresist 17a is preferably lefton the surface of the amorphous silicon to protect against unwantedetching). As before, because of the superficial layer, the chemicallyetched profile is created as desired. The same standard etchingtechniques as that mentioned above is then used to define the channelwaveguides. This gives an etched surface 21A in the buffer layer.Following steps are those described above with reference to FIG. 6e andonwards.

It will be appreciate that the general process disclosed herein can beutilised to fabricate any integrated combination of optical andelectronic circuits incorporating any type of electrical and opticalcomponents. The process disclosed herein can also be used to manufactureoptical components on their own, as discussed in the preamble.

It will be appreciated by persons skilled in the art that numerousvariations and/or modifications may be made to the invention as shown inthe specific embodiments without departing from the spirit or scope ofthe invention as broadly described. The present embodiments are,therefore, to be considered in all respects as illustrative and notrestrictive.

We claim:
 1. A method of fabricating an optical device on a substrate, comprising the step of forming an optical component by plasma enhanced chemical vapour deposition (PECVD) onto the substrate, the PECVD being carried out in the absence of nitrogen and nitrogen containing source materials.
 2. A method in accordance with claim 1, oxygen being used in the PECVD process as an oxidant for silane to form deposited silica.
 3. A method in accordance with claim 1, fluorine being used in the PECVD process as dopant to vary the refractive index of deposited silica.
 4. A method in accordance with claim 3, wherein carbon tetrafluoride is employed in the PECVD process as the source material for fluorine dopant.
 5. A method in accordance with claim 1, the PECVD process being carried out in a high plasma density hollow cathode deposition system comprising two opposing rf powered electrodes which operate to produce a high density plasma between them due to an "electron mirror" effect.
 6. A method in accordance with claim 5, oxygen being used as the oxidant for silicon, and the pressure in the chamber being sufficiently low to suppress spontaneous reaction between silane and oxygen.
 7. An integrated opto-electronic device, comprising a multilayer silica structure fabricated on a semiconductor substrate, the silica structure incorporating a waveguide defining a light path and a reflector within the light path for steering light to or from an electro-optic transducer fabricated in the semiconductor substrate.
 8. A device in accordance with claim 7, the waveguide being fabricated spaced from the semiconductor substrate and running substantially parallel thereto, the reflector being formed at an angle in a step in the waveguide to direct light travelling in the waveguide out of the waveguide, through the silica to or from the semiconductor substrate, to couple light in the light path to/from the electro-optic transducer.
 9. A device in accordance with claim 8, the reflector being arranged such that the angle of incidence of light travelling within the light path to the reflector is 45°.
 10. A device in accordance with claim 7, wherein the reflector is constructed by depositing a layer of aluminium onto the waveguide.
 11. A device in accordance with claim 7, fabricated utilising the method of fabricating an integrated opto-electronic arrangement, comprising an optical component fabricated in silica and an electronic component fabricated in a semiconductor substrate the method comprising the step of forming the optical component by plasma enhanced chemical vapour deposition (PECVD) onto the semiconductor substrate.
 12. A method of fabricating an integrated opto-electronic device, comprising a multilayer silica structure fabricated on a semiconductor substrate, the silica structure comprising a waveguide defining a light path and a reflector within the light path for steering light to or from an electro optic transducer fabricated in the semiconductor substrate, the method comprising the steps of, forming a waveguide core in a multilayer silica structure on a semiconductor substrate, forming an angled step in the waveguide core, and treating a surface of the step to form a reflector for steering light to the electro-optic transducer in the semiconductor substrate.
 13. A method in accordance with claim 12, wherein the step of forming a step in the waveguide core, comprises the steps of forming a step in a deposited silica buffer layer and subsequently depositing and forming a core layer on the stepped buffer layer.
 14. A method in accordance with claim 13, wherein the step of forming the step in the buffer layer comprises plasma treating the surface of the buffer layer to create a superficial layer, depositing an amorphous silicon mask on the superficial layer, opening a window in the amorphous silicon mask, and chemically etching the buffer layer at the window to provide a chemically etched stepped profile, whereby the superficial layer is etched faster during the chemical etching step whereby to create a desired stepped profile.
 15. A method in accordance with claim 13, wherein the step of depositing and forming the core layer on the stepped buffer layer, comprises depositing the core layer using a sufficient level of ion bombardment to maintain the angle of the stepped profile of the buffer layer.
 16. A method in accordance with claim 12, wherein the step of forming the angled step in the waveguide core, comprises forming a waveguide core layer, plasma treating the surface of the first waveguide core layer to create a superficial layer, depositing an amorphous silicon mask on the superficial layer, opening a window in the amorphous silicon mask, and chemically etching the core layer at the window to provide a stepped profile.
 17. A method in accordance with claim 1, wherein the substrate is a semiconductor substrate within which an electronic component has been fabricated, whereby the method results in the fabrication of an integrated opto-electronic arrangement. 